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Phase Locked Loop; it's a circuit which gives you your multiplied clock pulse. it essentially takes your bclk and multiplies it by the multiplier you set in bios (or stock). it feeds a input waveform into a differential amplifier (correct me if i'm wrong; been a year since i did my module on PLL) then into low pass filter, leaving only the 'error' margin, this gets amplified, which is what the voltage relates to (and thus higher voltage gives an easier lock-in error margin) and then is fed back (the loop bit ) into the diff amp (looks at the difference in input A and input B [fed back waveform]) then back through the LPF & amplifier circuit to the output.
i7's seem to be contrary to the usual belief that more volts means more stable waveform, so experiment with higher and lower to see what is more stable.
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Now this is really interesting. This must be coorelative to some other setting. No way should lower volts mean better performance at high bus speeds UNLESS it means more current... which could actually be dangerous... I need to research this some more..
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